DISEÑO DE ARQUITECTURAS ARITMÉTICAS DE CAMPO FINITO EN VHDL CON APLICACIONES EN SISTEMAS DE CRIPTOGRAFÍA DE CURVA ELÍPTICA

Abstract

In this thesis a polynomial multiplier, that operates elements of GF(2192), is presented. The multiplier is based in two schemes working together: tower fields and symmetric multipliers. In order to achieve the multiplier, four base multipliers have been proposed, one of them, and based in some design guidelines besides the security requirements, has been selected as a base multiplier for implementing the multiplier GF(((28)6)4) which is equivalent to GF(2192). The design guidelines for the proposed multiplier are efficiency and throughput; also, the security requirements are based in ANSI x9.62 which states that an application is secure if operates elements of a finite field bigger than GF(2192), with a standard basis, such as a polynomial basis. The results obtained in this thesis are within the expected parameters, reaching the main objective proposed at the beginning of this work.