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Campo DC | Valor | Lengua/Idioma |
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dc.contributor.author | Torres Soto, Aurora | - |
dc.contributor.author | Ponce de León Sentí, Eunice E. | - |
dc.contributor.author | Hernández Aguirre, Arturo | - |
dc.contributor.author | Torres Soto, María Dolores | - |
dc.contributor.author | Díaz Díaz, Elva | - |
dc.date.accessioned | 2013-05-31T01:20:46Z | - |
dc.date.available | 2013-05-31T01:20:46Z | - |
dc.date.issued | 2010-04-14 | - |
dc.identifier.citation | Revista Computación y Sistemas; Vol. 13 No.4 | es |
dc.identifier.issn | 1405-5546 | - |
dc.identifier.uri | http://www.repositoriodigital.ipn.mx/handle/123456789/16263 | - |
dc.description.abstract | Abstract. This paper presents a group of evolutionary mechanisms for the design of analog circuits, embedded on a genetic algorithm that performs the synthesis of an analog filter. The algorithm interacts with SPICE, to evaluate the fitness of evolved circuits. In order to model an analog circuit, a linear representation is introduced and its corresponding reproduction operators that preserve the valid topological analog circuit class closed. The novelty of this paper consists of the use of a linear representation in combination with the generation mechanism and closed operators that keep the non SPICE simulable circuits below one percent. Furthermore, the concept of preferred values is used into the generation mechanism and genetic operators in order to reduce the gap between the real circuits and the evolvable ones. The performance of the system at designing passive low pass filter is discussed and experiments performed show its efficiency | es |
dc.description.sponsorship | Instituto Politécnico Nacional - Centro de Investigación en Computación (CIC). | es |
dc.language.iso | en_US | es |
dc.publisher | Revista Computación y Sistemas; Vol. 13 No.4 | es |
dc.relation.ispartofseries | Revista Computación y Sistemas;Vol. 13 No. 4 | - |
dc.subject | Keywords. Analog Circuit Synthesis, Analog Filter Design, Genetic Algorithm, SPICE Simulation. | es |
dc.title | A Robust Evolvable System for the Synthesis of Analog Circuits | es |
dc.title.alternative | Un Sistema Evolutivo Robusto para la Síntesis de Circuitos Analógicos | es |
dc.type | Article | es |
dc.description.especialidad | Investigación en Computación | es |
dc.description.tipo | es | |
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v13no4_Art04.pdf | 141.83 kB | Adobe PDF | Visualizar/Abrir |
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